It is difficult for some implementations
to provide absolute guarantees to this effect,
since repeated and particularly inopportune interference
from other threads
may prevent forward progress,
by repeatedly stealing a cache line
for unrelated purposes
between load-locked and store-conditional instructions.
Implementations should ensure
that such effects cannot indefinitely delay progress
under expected operating conditions,
and that such anomalies
can therefore safely be ignored by programmers.
Outside this document,
this property is sometimes termed lock-free.
— end note